A high quality display device such as a large screen television has been widely used. Such a display device has a display area including a plurality of display pixels. A signal is input to each of the display pixels via a wiring such as a gate line and a source line. Accordingly, each of the display pixels is controlled independently and an image is formed on the display area.
In such a display device, the adjacent display pixels are connected via a parasitic capacitance and a problem regarding the crosstalk is caused. A conductive layer of the display pixels and a conductive layer of the wiring are arranged to face each other via an insulation layer, and this generates a parasitic capacitance. Therefore, a signal is input to the source line and a voltage applied to the source line changes, and this affects the display pixels via the parasitic capacitance and the voltage held in the display pixels may also change. This may cause a gap (crosstalk) between a display gradation that is actually displayed by the display pixels and a desired gradation that is desired to be displayed by the display pixels.
A technology of reducing crosstalk is described in Patent Document 1. Patent Document 1 describes reducing crosstalk between the display pixels that are connected to a same gate line. According to the technology, the crosstalk between the display pixels that are connected to the same gate line is less likely to occur, and this reduces occurrence of color crosstalk and improves color reproducibility.    [Patent Document 1] Japanese Registered Patent Publication No. 4184334